The present invention is concerned with semiconductor devices and methods of fabricating the same, and in particular relates to a semiconductor device and method of fabricating the same suitable for high integration density.
With great evolution of semiconductor technologies, semiconductor devices are being highly integrated more and more. The higher integration of semiconductor devices offers many advantages. For example, it makes a chip size smaller to raise the productivity thereof and increases the number of unit elements, resulting in high-performance semiconductor devices. Further, the higher integration is helpful to constructing semiconductor memory devices with larger capacity of data storage and reducing power consumption therein.
However, the higher integration also comes with various troubles in the semiconductor devices. For example, field effect transistors used as basic unit elements in the semiconductor devices would be deteriorated in characteristics due to short channel effects deepening while their channel lengths are being shortened. Those characteristic degradations in field effect transistors reduces the performance of nonvolatile memory devices, such as flash memories employing field effect transistor for memory cells, as well as volatile memory devices such as DRAMs or SRAMs. This can be especially troublesome in DRAMs, where it is inevitable to raise heights of storage nodes for large-performance capacitors, causing high step differences therein. Such high step differences would incur various kinds of defects in processing steps, e.g., photolithography or etching steps, resulting in degradation of productivity.